This page is for a past semester (f13) and is for archival purposes only
Computer Organization and Assembly Language Programming (CSE 2312)
Email Address:email@example.com (replace firstname with Taylor and lastname with Johnson)
Office Number:Engineering Research Building 559
Office Telephone Number:817-272-3610
Section Information:CSE 2312-002, Fall 2013 (85233)
Time and Place of Class Meetings:Nedderman Hall 111 (NH111), Tuesdays/Thursdays 2pm-3:20pm
Office Hours:ERB559, Tuesdays/Thursdays 3:30pm-4:30pm and by appointment (email me to schedule)
Graduate Teaching Assistant:Mohammadhani (Hani) Fouladgar
Graduate Teaching Assistant Email Address:firstname.lastname@example.org
Graduate Teaching Assistant Office Hours:Wednesdays/Thursdays, 9am-11am, ERB 124 (was ERB 408)
Undergraduate Teaching Assistant:Eric Nelson
Undergraduate Teaching Assistant Email Address:email@example.com
Undergraduate Teaching Assistant Office Hours:Mondays, noon-3pm, ERB 124 (was ERB 323)
Lab Rooms with QEMU and ARM Software:ERB 124, 125, and 131
Course Schedule (Syllabus; note that all information appearing on this website supersedes that appearing in the syllabus PDF, that is, the website is more up-to-date):The instructor for this course reserves the right to adjust this schedule in any way that serves the educational needs of the students enrolled in this course. All readings refer to Tanenbaum unless otherwise noted. All assignment dates are approximate at this point and will be updated on this website as the semester progresses.
- 8/22: Introduction
- 8/27: Structured Computers (Reading: Chapter 1; HW1 Assigned)
- 8/29: Computer Components: Processors, Memory, Input/Output
- 9/3: Quantifying Computer Components: Metrics like Clock Speed, Memory Sizes, etc.
- 9/5: More Processor Fundamentals (HW 1 Due; Reading: Chapter 2; HW2 Assigned)
- 9/10: Memory, Endianess, and Error Correcting Codes
- 9/12: Caches and Storage (Reading: 4.5.1)
- 9/17: Instruction Set Architectures: Data and Instruction Types (HW2 Due via Blackboard; Reading: Chapter 5; HW3 Assigned)
- 9/19: Memory Addressing Modes
- 9/24: Midterm Review
- 9/26: Midterm Exam (Chapters 1, 2, and part of Chapter 5 [Sections 5.1 through 5.5, excludes 5.5.5 and 5.5.7])
- 10/1: Flow of Control
- 10/3: ARM Overview (HW3 Due; HW4 Assigned)
- 10/8: Assembly Language, Directives, and Basic ARM Examples (examples; Reading: Chapter 7)
- 10/10: Assembly Process and Macros (examples)
- 10/15: Procedures (HW4 Due; HW5 Assigned)
- 10/17: Recursive Procedures (Examples)
- 10/22: Debugging QEMU and ARM with gdb (PA01 Assigned)
- 10/24: ARM Memory Map Details, Linking and Loading
- 10/29: Binary Arithmetic and Bit Manipulations (Reading: Appendix A)
- 10/31: Interrupts, Traps, and I/O: Focus on Output (Reading: Chapter 5, Sections 5.6.4-5.6.5; versatile pb manual, Section 4.1 and page 4-97)
- 11/5: More I/O (Focus on Input) (Reading: UART Manual, Section 3.2 and 3.3.1)
- 11/7: More I/O (Focus on DMA) (examples; PA01 Due; PA02 Assigned)
- 11/12: Floating Point Numbers (IEEE 754) and Floating Point Instructions on ARM (Reading: Appendix B; ARM Floating Point Instructions)
- 11/14: More Floating-Point and More Debugging QEMU and ARM with gdb
- 11/19: Advanced Flow of Control (examples)
- 11/21: More GDB Debugging and Combining C and Assembly (examples; PA3 Assigned)
- 11/26: Computer Organization Review using ARM as an Example (PA2 Due)
- 11/28: Thanksgiving Holiday (no classes)
- 12/3: Final Review Class
- 12/4: Last Day of Classes (PA3 Due)
- 12/10: Final Exam (2:00pm-4:30pm)
Textbooks and Other Course Materials:
- Andrew S. Tanenbaum, Structured Computer Organization, 6th Edition. Prentice-Hall, Inc., 2012. (Main Textbook)
- Kip Irvine, Assembly Language for Intel-Based Computers, 6th Edition, Prentice-Hall, Inc., 2011. (Optional)
- Paul A. Carter, PC Assembly Language, July 2006. (Optional; Free PDF Available)
- Quick-EMUlator (QEMU): Overview, Homepage
- Stack Overflow: ARM Assembly Suggestions
- Introduction to ARM Assembly Web Course
- ARM Instruction Summary
- ARM Register Names
- ARM Floating Point Register Names
- ARM Directives
- ARM Condition Codes
- ARM and Thumb-2 Instruction Set Quick Reference Card
- ARM Detecting Overflow of Arithmetic Operations (Addition)
- ARM Detecting Overflow of Arithmetic Operations (Multiply)
- ARM Conditional Execution
- ARM versatilepb Manual
- ARM PrimeCell UART (PL011) Manual
- ARM Floating Point Instructions
- GNU ARM Assembler (as) Manual
- ARM gcc
- GNU ARM
Description of Course Content:Computer organization from the viewpoint of software, including: the memory hierarchy, instruction set architectures, memory addressing, input-output, integer and floating-point representation and arithmetic. The relationship of higher-level programming languages to the operating system and to instruction set architecture are explored. Some programming in an assembly language.
Prerequisites:All students are expected to have passed the courses CSE 1320 Intermediate Programming and CSE 1310 Introduction to Computers and Programming or an equivalent before attending this course. Students are expected to have working experiences with software development.
Student Learning Outcomes:The objective of this course is to introduce computer science and engineering students to the architecture, organization, and low-level (assembly) programming of computing systems. At course conclusion, students should be able to:
- Define components of a computer system, such as input/output devices, memory, processors, etc.
- Define different types and levels of computer systems, such as instruction set architectures, device level architectures, microcontrollers, RISC, CISC, etc.
- Compute and compare basic performance metrics of programs on different architectures and levels
- Convert between binary and decimal representations, binary and character encodings like ASCII, real numbers and floating-point approximations, and perform manipulations of these information representations (arithmetic, etc.)
- Write, assemble, and execute assembly language programs to solve problems
- Write assembly programs using different endianness, addressing modes, stack features, and other architecture and ISA specific features
Descriptions of major assignments and examinations:Coursework for roughly the first half of the course will include homework assignments and a midterm exam covering roughly chapters 1, 2, and 5 of the textbook. The second half of the course will include fewer homework assignments, but several programming assignments in assembly language, and a final exam. Approximate due dates of assignments are shown in the course schedule.
Attendance:Students are strongly encouraged to attend lectures and come to office hours.
Other Requirements:Exams will be closed book, but students will be allowed to bring a two-sided sheet of letter-size paper. Students are expected to check the course website for updates to the course schedule throughout the semester.
Grading:Grade percentages will be calculated based on the following weights:
- Homework: 25%
- Programming Assignments: 35%
- Midterm Exam: 20%
- Final Exam: 20%
- 100 >= A >= 90
- 90 > B >= 80
- 80 > C >= 70
- 70 > D >= 60
- 60 > F >= 0
Make-Up Assignments and Exams:If you miss an exam or quiz due to unavoidable circumstances (e.g., health), you must notify the instructor in writing via email as soon as possible and request a makeup approval. If it is a planned (non-emergency) abcense, you must inform the instructor ahead of time! Do NOT ask for make-ups if you do not complete something due to travel (except when you are required to travel to represent the university or department on official business, but request at least 3 days ahead of the due date or exam time).
Grade Grievances:Any appeal of a grade in this course must follow the procedures and deadlines for grade-related grievances as published in the current undergraduate catalog (see here).
The first step is as follows. If you do not believe a grade on a particular assignment is correct, you may appeal the grade in writing (by email) within 5 days. Grade appeals must be appealed to the appropriate GTA first, then to the instructor if necessary.